Server memory glossary

Server DIMMs come in a few electrical types. RDIMM (registered) buffers the address/command lines through a register chip — the server standard. LRDIMM (load-reduced) also buffers the data lines, enabling the highest capacities and more modules per channel. MRDIMM (multiplexed rank) is the newest type: it multiplexes two ranks to roughly double bandwidth, reaching 8000–8800 MT/s on the latest platforms (Intel Xeon 6). UDIMM (unbuffered) has no register — entry servers and desktops. A server accepts only the types on its qualified parts list, and RDIMM and LRDIMM are generally not mixed.

Written like 2Rx8: the first number is how many ranks of DRAM chips the module has (1R, 2R, 4R, 8R), and x8/x4 is how many data bits each chip provides. Rank count and width affect how many modules a controller can drive at full speed and the module's maximum capacity, so they are a key compatibility spec — a server may qualify only specific organizations.

Error-correcting memory carries an extra DRAM chip that detects and corrects single-bit errors on the fly. Every server RDIMM / LRDIMM / MRDIMM module in this catalog is ECC — it is assumed, not a separate part number.

DDR4 and DDR5 are successive generations; they are physically and electrically incompatible (different notch, voltage and channel design) and a server takes one or the other. DDR5 runs faster at lower voltage and adds on-die ECC and two independent sub-channels per module.

Speed is quoted two ways. MT/s (mega-transfers per second, e.g. DDR4-3200, DDR5-4800) is the data rate used throughout the catalog. PC4-/PC5- numbers (e.g. PC4-25600) are the same speed as peak bandwidth in MB/s (MT/s × 8). A module runs at the lowest speed the CPU and configuration support ("CPU-dependent" / down-clocking).

3DS stacks multiple DRAM dies (with through-silicon vias) into one package, so a single module reaches very high capacities (128 GB, 256 GB and up). Common on high-capacity RDIMM/LRDIMM and often written into the organization (e.g. 2S2Rx4 = two stacks, two ranks).

CAS latency is the delay, in clock cycles, between the controller asking for data and the module delivering it. At the same speed a lower CL is marginally faster; for server compatibility the type, capacity, speed and rank matter far more than CL.

Operating voltage is fixed by generation for server memory: DDR4 = 1.2 V, DDR5 = 1.1 V. It is derived from the generation, not a spec to match separately.